vgbc/tests/test_cpu_simple.cpp

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2023-08-28 22:31:24 +02:00
#include "doctest.h"
#include "cpu/cpu.h"
#include "memory/ram.h"
TEST_CASE("simple load and add")
{
u8 test_ram[] = {
0x3E, 0x10, // LD A, $0x10
0x87, // ADD A, A
};
RAM r(test_ram, 3, true);
Cpu cpu(&r);
CHECK(cpu.state.PC == 0x0);
cpu.step();
CHECK(cpu.state.PC == 0x2);
CHECK(cpu.state.A == 0x10);
cpu.step();
CHECK(cpu.state.PC == 0x3);
CHECK(cpu.state.A == 0x20);
}
TEST_CASE("direct jump")
{
u8 test_ram[] = {
0xC3, 0x05, 0x00, // JMP $0x0005
0x00, 0x00, // NOP NOP
0xC3, 0x00, 0x00, // JMP $0x0000
};
RAM r(test_ram, 8, true);
Cpu cpu(&r);
CHECK(cpu.state.PC == 0x0000);
cpu.step();
CHECK(cpu.state.PC == 0x0005);
cpu.step();
CHECK(cpu.state.PC == 0x0000);
}
TEST_CASE("LD HL, nn; LD A, [HL]; LD A, n; LD [HL], A")
{
u8 test_ram[] = {
0x21, 0x20, 0x00, // LD HL, $0x0020
0x7E, // LD A, [HL]
0x3E,0x5A, // LD A, $0x5A
0x77, // LD [HL], A
0x00,
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
0xA5, // . = 0x0020
};
RAM r(test_ram, 0x0021, false);
Cpu cpu(&r);
CHECK(cpu.state.PC == 0x0);
cpu.step();
CHECK(cpu.state.PC == 0x3);
CHECK(cpu.state.HL == 0x0020);
CHECK(cpu.state.A == 0x0);
cpu.step();
CHECK(cpu.state.PC == 0x4);
CHECK(cpu.state.A == 0xA5);
cpu.step();
CHECK(cpu.state.PC == 0x6);
CHECK(cpu.state.A == 0x5A);
cpu.step();
CHECK(cpu.state.PC == 0x7);
CHECK(test_ram[0x20] == 0x5A);
}