cpu/decoder - Implement ADD HL, rr
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2 changed files with 12 additions and 0 deletions
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@ -172,6 +172,16 @@ void Cpu::executeInstruction()
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mcycles = 3;
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}
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}
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else if((op & 0xCF) == 0x09) // ADD HL, rr
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{
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u16 rhs = state.reg16((op >> 4) & 0x3);
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u16 res12 = (state.HL & 0x0FFF) + (rhs & 0x0FFF);
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state.halfcarry = (res11 & 0x1000);
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u32 res32 = (u32)state.HL + (u32)rhs;
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state.carry = (res32 & 0x10000);
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state.subtract = false;
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mcycles = 2;
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}
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else if((op & 0xE7) == 0xC0) // RET cc
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{
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if(decodeCond((op >> 3) & 0x3))
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2
types.h
2
types.h
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@ -2,6 +2,8 @@
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typedef unsigned char u8;
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typedef unsigned short u16;
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typedef unsigned int u32;
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typedef signed char s8;
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typedef signed short s16;
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typedef signed int s32;
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