Simplify decoder code somewhat.
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ab09bbd9b7
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93521e559c
1 changed files with 55 additions and 12 deletions
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@ -46,9 +46,9 @@ void Cpu::step()
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opcode_t op = readPC8();
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int mcycles = 1;
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if ((op & 0xC0 == 0x40) && op != 0x76) // Lots of LD (0x76 is HALT)
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if ((op & 0xC0 == 0x40) && op != 0x76) // LD r, r'
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{
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u9 tmp;
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u8 tmp;
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switch(op & 0x07)
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{
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case 0x0: tmp = state.B; break;
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@ -61,21 +61,64 @@ void Cpu::step()
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case 0x7: tmp = state.A; break;
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};
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switch(op & 0x38)
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switch((op >> 3) & 0x7)
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{
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case 0x00: state.B = tmp; break;
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case 0x10: state.D = tmp; break;
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case 0x20: state.H = tmp; break;
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case 0x30: bus->write8(state.HL, tmp); break;
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case 0x08: state.C = tmp; break;
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case 0x18: state.E = tmp; break;
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case 0x28: state.L = tmp; break;
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case 0x38: state.A = tmp; break;
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case 0x0: state.B = tmp; break;
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case 0x1: state.C = tmp; break;
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case 0x2: state.D = tmp; break;
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case 0x3: state.E = tmp; break;
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case 0x4: state.H = tmp; break;
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case 0x5: state.L = tmp; break;
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case 0x6: bus->write8(state.HL, tmp); break;
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case 0x7: state.A = tmp; break;
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}
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}
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else if(op & 0xC7 == 0x06)
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else if(op & 0xC7 == 0x06) // LD r, n
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{
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u8 imm = readPC8();
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switch((op >> 3) & 0x7)
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{
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case 0x0: state.B = imm; break;
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case 0x1: state.C = imm; break;
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case 0x2: state.D = imm; break;
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case 0x3: state.E = imm; break;
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case 0x4: state.H = imm; break;
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case 0x5: state.L = imm; break;
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case 0x6: bus->write8(state.HL, tmp); break;
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case 0x7: state.A = imm; break;
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}
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}
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else if(op & 0xC7 == 0x46 && op != 0x76) // LD r, [HL]
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{
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u8 data = bus->read8(state.HL);
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switch((op >> 3) & 0x7)
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{
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case 0x0: state.B = imm; break;
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case 0x1: state.C = imm; break;
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case 0x2: state.D = imm; break;
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case 0x3: state.E = imm; break;
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case 0x4: state.H = imm; break;
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case 0x5: state.L = imm; break;
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case 0x7: state.A = imm; break;
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}
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}
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else if(op & 0xC8 == 0x70 && op != 0x76) // LD [HL], r
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{
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u8 data;
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switch(op & 0x7)
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{
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case 0x0: data = state.B; break;
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case 0x1: data = state.C; break;
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case 0x2: data = state.D; break;
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case 0x3: data = state.E; break;
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case 0x4: data = state.H; break;
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case 0x5: data = state.L; break;
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case 0x7: data = state.A; break;
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}
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bus->write8(state.HL, data);
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}
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else
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{
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