From af5d478f4004070d109a4cf856afeb53700d36fc Mon Sep 17 00:00:00 2001 From: MadMaurice Date: Tue, 29 Aug 2023 12:10:10 +0200 Subject: [PATCH] test_cpu_simple - Add TEST_CASE for PUSH rr, POP rr, CALL nn and RET --- tests/test_cpu_simple.cpp | 85 ++++++++++++++++++++++++++++++++++++++- 1 file changed, 84 insertions(+), 1 deletion(-) diff --git a/tests/test_cpu_simple.cpp b/tests/test_cpu_simple.cpp index 70265e6..fd14f3e 100644 --- a/tests/test_cpu_simple.cpp +++ b/tests/test_cpu_simple.cpp @@ -87,5 +87,88 @@ TEST_CASE("LD HL, nn; LD A, [HL]; LD A, n; LD [HL], A") CHECK(cpu.state.PC == 0x7); CHECK(test_ram[0x20] == 0x5A); - +} + +TEST_CASE("PUSH rr ; POP rr") +{ + u8 test_ram[] = { + /* 0x0000 */ 0x31, 0x10, 0x00, // LD SP, $0x0010 + /* 0x0003 */ 0x01, 0xAA, 0x55, // LD BC, $0x55AA + /* 0x0006 */ 0xC5, // PUSH BC + /* 0x0007 */ 0x01, 0x55, 0xAA, // LD BC, $0xAA55 + /* 0x000A */ 0xD1, // POP DE + /* 0x000B */ 0x00, 0x00, 0x00, 0x00, 0x00, + /* 0x0010 */ 0x12, 0x34, + }; + + RAM r(test_ram, 0x0012, false); + Cpu cpu(&r); + + cpu.step(); + + CHECK(cpu.state.PC == 0x0003); + CHECK(cpu.state.SP == 0x0010); + + cpu.step(); + + CHECK(cpu.state.PC == 0x0006); + CHECK(cpu.state.BC == 0x55AA); + + cpu.step(); + + CHECK(cpu.state.PC == 0x0007); + CHECK(cpu.state.SP == 0x000E); + CHECK(test_ram[0x000E] == 0xAA); + CHECK(test_ram[0x000F] == 0x55); + + cpu.step(); + + CHECK(cpu.state.PC == 0x000A); + CHECK(cpu.state.BC == 0xAA55); + + cpu.step(); + + CHECK(cpu.state.PC == 0x000B); + CHECK(cpu.state.DE == 0x55AA); +} + +TEST_CASE("CALL ; RET") +{ + u8 test_ram[] = { + /* 0x0000 */ 0x31, 0x10, 0x00, // LD SP, $0x0010 + /* 0x0003 */ 0xCD, 0x0A, 0x00, // CALL $0x000A + /* 0x0006 */ 0x00, 0x00, 0x00, 0x00, // 4 x NOP + /* 0x000A */ 0x00, // NOP + /* 0x000B */ 0xC9, // RET + /* 0x000C */ 0xaa, 0xaa, 0xaa, 0xaa, + /* 0x000D */ 0xaa, 0xaa, 0xaa, + /* 0x0010 */ + }; + + RAM r(test_ram, 0x10, false); + Cpu cpu(&r); + + cpu.step(); // LD SP, $0x0010 + + CHECK(cpu.state.PC == 0x0003); + CHECK(cpu.state.SP == 0x0010); + + cpu.step(); // CALL $0x000A + + CHECK(cpu.state.PC == 0x000A); + CHECK(cpu.state.SP == 0x000E); + CHECK(test_ram[0x000F] == 0x00); + CHECK(test_ram[0x000E] == 0x06); + + cpu.step(); // NOP + + CHECK(cpu.state.PC == 0x000B); + CHECK(cpu.state.SP == 0x000E); + CHECK(test_ram[0x000F] == 0x00); + CHECK(test_ram[0x000E] == 0x06); + + cpu.step(); // RET + + CHECK(cpu.state.PC == 0x0006); + CHECK(cpu.state.SP == 0x0010); }