From bd2b577c6c9303de37a3715bc9d273e2f359fa39 Mon Sep 17 00:00:00 2001
From: MadMaurice <madmaurice@zom.bi>
Date: Mon, 28 Aug 2023 22:31:52 +0200
Subject: [PATCH] decoder - Add parenthesis to bitwise ANDs

== has priority over & so a & b == c is parsed as a & (b == c)
---
 cpu/decoder.cpp | 45 +++++++++++++++++++++------------------------
 1 file changed, 21 insertions(+), 24 deletions(-)

diff --git a/cpu/decoder.cpp b/cpu/decoder.cpp
index a93443a..176232c 100644
--- a/cpu/decoder.cpp
+++ b/cpu/decoder.cpp
@@ -9,10 +9,13 @@ static inline u16 make_u16(u8 msb, u8 lsb)
 
 void Cpu::executeInstruction()
 {
+  u16 currentpc = state.PC;
   opcode_t op = readPC8();
   int mcycles = 1;
 
-  if ((op & 0xC0 == 0x40) && op != 0x76) // LD r, r'
+  printf("@0x%04x: opcode %02X\n",currentpc,op);
+
+  if ((op & 0xC0) == 0x40 && op != 0x76) // LD r, r'
     {
       u8 tmp;
       switch(op & 0x07)
@@ -39,7 +42,7 @@ void Cpu::executeInstruction()
         case 0x7: state.A = tmp; break;
         }
     }
-  else if(op & 0xC7 == 0x06) // LD r, n
+  else if((op & 0xC7) == 0x06) // LD r, n
     {
       u8 imm = readPC8();
 
@@ -55,7 +58,7 @@ void Cpu::executeInstruction()
         case 0x7: state.A = imm; break;
         }
     }
-  else if(op & 0xC7 == 0x46 && op != 0x76) // LD r, [HL]
+  else if((op & 0xC7) == 0x46 && op != 0x76) // LD r, [HL]
     {
       u8 data = bus->read8(state.HL);
 
@@ -70,7 +73,7 @@ void Cpu::executeInstruction()
         case 0x7: state.A = data; break;
         }
     }
-  else if(op & 0xC8 == 0x70 && op != 0x76) // LD [HL], r
+  else if((op & 0xC8) == 0x70 && op != 0x76) // LD [HL], r
     {
       u8 data;
       switch(op & 0x7)
@@ -86,7 +89,7 @@ void Cpu::executeInstruction()
 
       bus->write8(state.HL, data);
     }
-  else if(op & 0xCF == 0x01) // LD rr, nn
+  else if((op & 0xCF) == 0x01) // LD rr, nn
     {
       u16 data = readPC16();
 
@@ -100,7 +103,7 @@ void Cpu::executeInstruction()
 
       mcycles = 3;
     }
-  else if(op & 0xCF == 0xC5) // PUSH rr
+  else if((op & 0xCF) == 0xC5) // PUSH rr
     {
       u16 data;
       switch((op >> 4) & 0x3)
@@ -117,7 +120,7 @@ void Cpu::executeInstruction()
 
       mcycles = 4;
     }
-  else if(op & 0xCF == 0xC1) // POP rr
+  else if((op & 0xCF) == 0xC1) // POP rr
     {
       u16 data = bus->read16(state.SP);
 
@@ -133,7 +136,7 @@ void Cpu::executeInstruction()
 
       mcycles = 4;
     }
-  else if(op & 0xC0 == 0x80) // ADD, ADC, SUB, ABC, CP, AND, OR, XOR
+  else if((op & 0xC0) == 0x80) // ADD, ADC, SUB, ABC, CP, AND, OR, XOR
     {
       // SUB r: 0b10010xxx
       // CP  r: 0b10111xxx
@@ -155,7 +158,7 @@ void Cpu::executeInstruction()
 
       aluop8(aluop, rhs);
     }
-  else if(op & 0xC6 == 0x04) // INC r; INC [HL]; DEC r; DEC [HL];
+  else if((op & 0xC6) == 0x04) // INC r; INC [HL]; DEC r; DEC [HL];
     {
       AluOp aluop = (op & 0x1) ? SUB : ADD;
 
@@ -180,7 +183,7 @@ void Cpu::executeInstruction()
         }
 
     }
-  else if(op & 0xE7 == 0xC2) // JP cc, nn:
+  else if((op & 0xE7) == 0xC2) // JP cc, nn:
     {
       u16 nn = readPC16();
 
@@ -194,7 +197,7 @@ void Cpu::executeInstruction()
           mcycles = 3;
         }
     }
-  else if(op & 0xE7 == 0x20) // JR cc, e
+  else if((op & 0xE7) == 0x20) // JR cc, e
     {
       s8 e = readPC8();
 
@@ -209,7 +212,7 @@ void Cpu::executeInstruction()
           mcycles = 2;
         }
     }
-  else if(op & 0xE7 == 0xC4) // CALL cc, nn
+  else if((op & 0xE7) == 0xC4) // CALL cc, nn
     {
       u16 nn = readPC16();
 
@@ -223,7 +226,7 @@ void Cpu::executeInstruction()
           mcycles = 3;
         }
     }
-  else if(op & 0xE7 == 0xC0) // RET cc
+  else if((op & 0xE7) == 0xC0) // RET cc
     {
       if(decodeCond((op >> 3) & 0x3))
         {
@@ -235,7 +238,7 @@ void Cpu::executeInstruction()
           mcycles = 2;
         }
     }
-  else if(op & 0xC7 == 0xC7) // RST
+  else if((op & 0xC7) == 0xC7) // RST
     {
       u16 rst_addr = op & 0x38;
       doCall(rst_addr);
@@ -284,18 +287,12 @@ void Cpu::executeInstruction()
           mcycles = 2;
           break;
         case 0xF0: // LD A, [0xFF : n]
-          {
-            u8 n = readPC8();
-            state.A = bus->read8(make_u16(0xFFu,n));
-            mcycles = 3;
-          }
+          state.A = bus->read8(make_u16(0xFFu,readPC8()));
+          mcycles = 3;
           break;
         case 0xE0: // LD [0xFF : n], A
-          {
-            u8 n = readPC8();
-            bus->write8(make_u16(0xFFu,n), state.A);
-            mcycles = 3;
-          }
+          bus->write8(make_u16(0xFFu,readPC8()), state.A);
+          mcycles = 3;
           break;
         case 0x3A: // LD A, [HL-]
           state.A = bus->read8(state.HL); state.HL--; mcycles = 2; break;