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8f1b1eb924
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cpu/decoder - Implement INC rr and DEC rr
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2023-08-29 23:04:59 +02:00 |
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e893d2b9f5
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cpu/decoder - Use variable instead calculating twice
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2023-08-29 23:04:31 +02:00 |
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43088a7f99
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cpu/decoder - Remove extraneous comments
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2023-08-29 21:27:32 +02:00 |
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39e041f473
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cpu/decoder - Implement RLCA, RLA, RRCA, RRA
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2023-08-29 21:25:19 +02:00 |
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7902ac4641
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cpu/decoder - little code improvement
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2023-08-29 21:14:19 +02:00 |
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a9b0b37a2e
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tests - Add test_cpu_prefix
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2023-08-29 21:01:23 +02:00 |
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50cac936b9
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cpu/decoder - Implement PREFIX (bit shift & bit ops)
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2023-08-29 21:00:37 +02:00 |
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cf54c7ec5f
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tests - Add test for JR e instruction
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2023-08-29 19:43:38 +02:00 |
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8160037ffc
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cpu/decoder - Improve code formatting
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2023-08-29 19:43:19 +02:00 |
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40b5d1d370
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cpu/decoder - Fix decoding of JR e instruction
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2023-08-29 19:42:42 +02:00 |
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8383256d7e
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cpu - Fix order of 8-bit registers in memory
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2023-08-29 19:42:01 +02:00 |
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a7e8c51bdb
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tests - Add test_cpu_state
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2023-08-29 19:41:52 +02:00 |
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ddea64ec63
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cpu/decoder - Remove unnessary intermediate variable
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2023-08-29 16:54:17 +02:00 |
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c08fd5d68d
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cpu/decoder - Actually use pushStack16 and popStack16 for POP and PUSH
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2023-08-29 16:53:53 +02:00 |
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310fb99ad2
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cpu/decoder - Simplify decoding by referencing registers by index
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2023-08-29 16:53:20 +02:00 |
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eabc39590e
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cpu/panic - Improve declaration
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2023-08-29 16:51:58 +02:00 |
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8cb6130d06
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tests - Add first interrupt tests
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2023-08-29 13:47:06 +02:00 |
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216cf660a1
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cpu/cpu - Add way to signal interrupt from outside
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2023-08-29 13:45:55 +02:00 |
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7aa1af40fb
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cpu/cpu - Treat a call to an ISR as a step
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2023-08-29 13:45:46 +02:00 |
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e15630fb80
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memory/ram - initialize with zeroes
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2023-08-29 13:44:29 +02:00 |
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af5d478f40
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test_cpu_simple - Add TEST_CASE for PUSH rr, POP rr, CALL nn and RET
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2023-08-29 12:10:10 +02:00 |
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1fc081b3c5
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cpu - Fix push operations
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2023-08-29 12:10:10 +02:00 |
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002b745917
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cpu - Fix timing of delay when enabling interrupts
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2023-08-29 12:10:10 +02:00 |
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1194340657
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test_cpu_simple - Add a few more test cases
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2023-08-28 23:08:45 +02:00 |
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763fe13f5a
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decoder - Disable debug printf
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2023-08-28 23:08:33 +02:00 |
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0ce79045e3
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tests - Implement simple ram tests
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2023-08-28 23:08:19 +02:00 |
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6f8f90afbe
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Remove verbosity for successful tests
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2023-08-28 23:07:53 +02:00 |
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bd2b577c6c
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decoder - Add parenthesis to bitwise ANDs
== has priority over & so a & b == c is parsed as a & (b == c)
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2023-08-28 22:31:52 +02:00 |
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eb6faab89f
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Use doctest as test framework
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2023-08-28 22:31:24 +02:00 |
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b64c82ec92
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Improve build system and add support for tests
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2023-08-28 21:56:54 +02:00 |
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505478b840
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Improve Cpu class and implement interrupts
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2023-08-28 21:56:33 +02:00 |
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e859f8ad2c
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Implement mem device for bootrom overlay
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2023-08-28 21:55:46 +02:00 |
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e4a6b1f9b4
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decoder - Simplify RST command
We can calculate the rst address directly from the op code.
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2023-08-28 19:39:18 +02:00 |
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ad2334a6af
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Implement more parts of decoder
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2023-08-27 22:19:02 +02:00 |
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93521e559c
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Simplify decoder code somewhat.
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2023-08-27 00:15:12 +02:00 |
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ab09bbd9b7
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more decoder code
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2023-08-26 23:51:51 +02:00 |
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8d063c08ca
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Fix build errors.
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2023-08-26 21:17:47 +02:00 |
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8019408684
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Add gitignore
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2023-08-26 21:17:29 +02:00 |
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ba5b55a196
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WIP initial state
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2023-08-26 19:04:02 +02:00 |
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6cacf1ae80
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Initial empty commit
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2023-08-26 19:03:33 +02:00 |
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