|
4e506a4d3c
|
cpu/decoder - Implement LD HL, SP + e8
|
2023-08-29 23:46:09 +02:00 |
|
|
7180ae8c40
|
cpu/decoder - Implement HALT
|
2023-08-29 23:32:11 +02:00 |
|
|
5cabe03d25
|
cpu/cpu - Handle halt mode
|
2023-08-29 23:30:31 +02:00 |
|
|
077f834c28
|
Makefile - Also clean test objs
|
2023-08-29 23:22:20 +02:00 |
|
|
c2d5ca5cfc
|
tests - Build o-files for tests
This should reduce build time when rebuilding tests
|
2023-08-29 23:19:13 +02:00 |
|
|
a3730b868c
|
Makefile - let objs depend on all headers
|
2023-08-29 23:18:51 +02:00 |
|
|
5281ceb0d6
|
cpu/cpu - Fix include
|
2023-08-29 23:16:18 +02:00 |
|
|
7425663f16
|
Move types.h to misc
|
2023-08-29 23:16:09 +02:00 |
|
|
eb0e591b25
|
Move panic.h to misc
|
2023-08-29 23:15:00 +02:00 |
|
|
ef2615c1a7
|
cpu/decoder - Fix build errors
|
2023-08-29 23:13:23 +02:00 |
|
|
517577d546
|
Improve consistency for including
|
2023-08-29 23:11:31 +02:00 |
|
|
c39a680293
|
cpu/decoder - Fix IME state for RETI
|
2023-08-29 23:06:50 +02:00 |
|
|
28bc389644
|
cpu/decoder - Reset carry flag for PREFIX SWAP instruction
|
2023-08-29 23:06:28 +02:00 |
|
|
b6f0f4416f
|
cpu/decoder - Implement ADD SP, e8
|
2023-08-29 23:06:05 +02:00 |
|
|
41c4038d0a
|
cpu/decoder - Implement ADD HL, rr
|
2023-08-29 23:05:55 +02:00 |
|
|
8f1b1eb924
|
cpu/decoder - Implement INC rr and DEC rr
|
2023-08-29 23:04:59 +02:00 |
|
|
e893d2b9f5
|
cpu/decoder - Use variable instead calculating twice
|
2023-08-29 23:04:31 +02:00 |
|
|
43088a7f99
|
cpu/decoder - Remove extraneous comments
|
2023-08-29 21:27:32 +02:00 |
|
|
39e041f473
|
cpu/decoder - Implement RLCA, RLA, RRCA, RRA
|
2023-08-29 21:25:19 +02:00 |
|
|
7902ac4641
|
cpu/decoder - little code improvement
|
2023-08-29 21:14:19 +02:00 |
|
|
a9b0b37a2e
|
tests - Add test_cpu_prefix
|
2023-08-29 21:01:23 +02:00 |
|
|
50cac936b9
|
cpu/decoder - Implement PREFIX (bit shift & bit ops)
|
2023-08-29 21:00:37 +02:00 |
|
|
cf54c7ec5f
|
tests - Add test for JR e instruction
|
2023-08-29 19:43:38 +02:00 |
|
|
8160037ffc
|
cpu/decoder - Improve code formatting
|
2023-08-29 19:43:19 +02:00 |
|
|
40b5d1d370
|
cpu/decoder - Fix decoding of JR e instruction
|
2023-08-29 19:42:42 +02:00 |
|
|
8383256d7e
|
cpu - Fix order of 8-bit registers in memory
|
2023-08-29 19:42:01 +02:00 |
|
|
a7e8c51bdb
|
tests - Add test_cpu_state
|
2023-08-29 19:41:52 +02:00 |
|
|
ddea64ec63
|
cpu/decoder - Remove unnessary intermediate variable
|
2023-08-29 16:54:17 +02:00 |
|
|
c08fd5d68d
|
cpu/decoder - Actually use pushStack16 and popStack16 for POP and PUSH
|
2023-08-29 16:53:53 +02:00 |
|
|
310fb99ad2
|
cpu/decoder - Simplify decoding by referencing registers by index
|
2023-08-29 16:53:20 +02:00 |
|
|
eabc39590e
|
cpu/panic - Improve declaration
|
2023-08-29 16:51:58 +02:00 |
|
|
8cb6130d06
|
tests - Add first interrupt tests
|
2023-08-29 13:47:06 +02:00 |
|
|
216cf660a1
|
cpu/cpu - Add way to signal interrupt from outside
|
2023-08-29 13:45:55 +02:00 |
|
|
7aa1af40fb
|
cpu/cpu - Treat a call to an ISR as a step
|
2023-08-29 13:45:46 +02:00 |
|
|
e15630fb80
|
memory/ram - initialize with zeroes
|
2023-08-29 13:44:29 +02:00 |
|
|
af5d478f40
|
test_cpu_simple - Add TEST_CASE for PUSH rr, POP rr, CALL nn and RET
|
2023-08-29 12:10:10 +02:00 |
|
|
1fc081b3c5
|
cpu - Fix push operations
|
2023-08-29 12:10:10 +02:00 |
|
|
002b745917
|
cpu - Fix timing of delay when enabling interrupts
|
2023-08-29 12:10:10 +02:00 |
|
|
1194340657
|
test_cpu_simple - Add a few more test cases
|
2023-08-28 23:08:45 +02:00 |
|
|
763fe13f5a
|
decoder - Disable debug printf
|
2023-08-28 23:08:33 +02:00 |
|
|
0ce79045e3
|
tests - Implement simple ram tests
|
2023-08-28 23:08:19 +02:00 |
|
|
6f8f90afbe
|
Remove verbosity for successful tests
|
2023-08-28 23:07:53 +02:00 |
|
|
bd2b577c6c
|
decoder - Add parenthesis to bitwise ANDs
== has priority over & so a & b == c is parsed as a & (b == c)
|
2023-08-28 22:31:52 +02:00 |
|
|
eb6faab89f
|
Use doctest as test framework
|
2023-08-28 22:31:24 +02:00 |
|
|
b64c82ec92
|
Improve build system and add support for tests
|
2023-08-28 21:56:54 +02:00 |
|
|
505478b840
|
Improve Cpu class and implement interrupts
|
2023-08-28 21:56:33 +02:00 |
|
|
e859f8ad2c
|
Implement mem device for bootrom overlay
|
2023-08-28 21:55:46 +02:00 |
|
|
e4a6b1f9b4
|
decoder - Simplify RST command
We can calculate the rst address directly from the op code.
|
2023-08-28 19:39:18 +02:00 |
|
|
ad2334a6af
|
Implement more parts of decoder
|
2023-08-27 22:19:02 +02:00 |
|
|
93521e559c
|
Simplify decoder code somewhat.
|
2023-08-27 00:15:12 +02:00 |
|